Shuttling instructions and data through a single channel between processor and memory caps performance however fast the processor becomes.
Named by Backus in his 1977 Turing Award lecture, for the architecture von Neumann described rather than a claim he made. It is why cache hierarchy design dominates modern processor performance.
In practice
- A processor that could compute far faster spends most of its cycles waiting for data to arrive.
- A team whose analysts could produce four times the output spends most of its capacity waiting for access to the data.
- Standing
- Named by Backus for the architecture von Neumann described, not a claim von Neumann made.
- Subject
- Technology & Software
- Essay
- The curves, the limits and the laws of software